Design of Digital Down Converter of Mini SAR

Wang Hong-xian; Li Gang; Xing Meng-dao; Zhang Shou-hong

doi:10.3724/SP.J.1146.2008.01770

Volume 32 Issue 2

Aug. 2010

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Wang Hong-xian, Li Gang, Xing Meng-dao, Zhang Shou-hong. Design of Digital Down Converter of Mini SAR[J]. Journal of Electronics & Information Technology, 2010, 32(2): 485-489. doi: 10.3724/SP.J.1146.2008.01770

Citation:

Wang Hong-xian, Li Gang, Xing Meng-dao, Zhang Shou-hong. Design of Digital Down Converter of Mini SAR[J]. Journal of Electronics & Information Technology, 2010, 32(2): 485-489. doi: 10.3724/SP.J.1146.2008.01770

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Design of Digital Down Converter of Mini SAR

doi: 10.3724/SP.J.1146.2008.01770

Received Date: 2008-12-24
Rev Recd Date: 2009-11-10
Publish Date: 2010-02-19

Abstract

Abstract

In the designation of the real-time imaging machine of Mini SAR, the radar return signal is sampled in the intermediate frequency, then Digital Down Converter(DDC) is used to realize quadrature demodulate, which can reduce system complexity and improve radars performance. The difficulty in the design of the DDC of Mini SAR is firstly given in this paper, i.e. the sampling frequency is as high as 2Gsps and the bandwidth is 900MHz, which leads large difficulty in real-time processing. The optimal architecture of DDC based on real design parameters is given in the next, with the emphasis on the difference of the parallel FIR filter and fast FIR filter. Then the implementation of the DDC module using parallel processing with optimized structure in FPGA is given, the resource usage, running speed and quantity noise influence are given. Finally, the result of Mini SAR is given, which confirms the validity of the design.

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References(1)

References

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