Review of the Fused Technology of Sensing, Storage and Computing Based on SRAM

YANG Xinghua; YANG Ziyi; SU Haijin; JIANG Weihuang; ZHANG Jing; WEI Qi; LUO Li; WANG Zhongjing; LÜ Huafang; QIAO Fei

doi:10.11999/JEIT220815

Volume 45 Issue 8

Aug. 2023

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Article Navigation > Journal of Electronics & Information Technology > 2023 > 45(8): 2828-2838

YANG Xinghua, YANG Ziyi, SU Haijin, JIANG Weihuang, ZHANG Jing, WEI Qi, LUO Li, WANG Zhongjing, LÜ Huafang, QIAO Fei. Review of the Fused Technology of Sensing, Storage and Computing Based on SRAM[J]. Journal of Electronics & Information Technology, 2023, 45(8): 2828-2838. doi: 10.11999/JEIT220815

Citation:

YANG Xinghua, YANG Ziyi, SU Haijin, JIANG Weihuang, ZHANG Jing, WEI Qi, LUO Li, WANG Zhongjing, LÜ Huafang, QIAO Fei. Review of the Fused Technology of Sensing, Storage and Computing Based on SRAM[J]. Journal of Electronics & Information Technology, 2023, 45(8): 2828-2838. doi: 10.11999/JEIT220815

Citation:

YANG Xinghua, YANG Ziyi, SU Haijin, JIANG Weihuang, ZHANG Jing, WEI Qi, LUO Li, WANG Zhongjing, LÜ Huafang, QIAO Fei. Review of the Fused Technology of Sensing, Storage and Computing Based on SRAM[J]. Journal of Electronics & Information Technology, 2023, 45(8): 2828-2838. doi: 10.11999/JEIT220815

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Review of the Fused Technology of Sensing, Storage and Computing Based on SRAM

doi: 10.11999/JEIT220815

1.
College of Science, Beijing Forestry University, Beijing 100091, China
2.
School of Information, North China University of Technology, Beijing 100041, China
3.
School of Electronic and Information Engineering, Beijing Jiaotong University, Beijing 100044, China
4.
Tsinghua University, Beijing 100084, China

Funds: The National Natural Science Foundation of China (92164203)，The Tsinghua University-Ningxia Yinchuan Water Network Digital Water Control Joint Research Institute Fund Project (SKL-IOW-2020TC2003)

Received Date: 2022-06-21
Accepted Date: 2022-12-20
Rev Recd Date: 2022-12-10

Available Online: 2022-12-23

Publish Date: 2023-08-21

Abstract

Abstract

The integrated chip architecture based on SRAM memory combines sensing, storage and computing functions, solving the problem of “storage wall” faced by the Von Neumann architecture by enabling the memory unit to have computing power and avoiding the transfer of data during the calculation process. This structure is combined with the sensor part to achieve ultra-high-speed, ultra-low-power computing power. SRAM memory has great advantages in terms of speed compared to other memory, mainly reflected in the fact that the architecture can achieve a high energy efficiency ratio, which can ensure high accuracy after the accuracy is enhanced, and is suitable for large computing power scenario design under the requirements of low power consumption and high performance. This paper introduces the structure of the sensor-memory-computing chip based on SRAM memory, investigates the research and development of SRAM-based sensor-memory-computing integration in the voltage domain, charge domain and digital domain, and discusses the future development direction of this field.
- Integration of sensing, storage and computing,
- SRAM Memory,
- Von Neumann

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References(40)

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