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Volume 45 Issue 8
Aug.  2023
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JIANG Lin, ZHANG Dingyue, LI Yuancheng, CAO Fei, LONG Maosen. 1T1M Reconfigurable Array Structure Based on Memristor[J]. Journal of Electronics & Information Technology, 2023, 45(8): 3047-3056. doi: 10.11999/JEIT220718
Citation: JIANG Lin, ZHANG Dingyue, LI Yuancheng, CAO Fei, LONG Maosen. 1T1M Reconfigurable Array Structure Based on Memristor[J]. Journal of Electronics & Information Technology, 2023, 45(8): 3047-3056. doi: 10.11999/JEIT220718

1T1M Reconfigurable Array Structure Based on Memristor

doi: 10.11999/JEIT220718
Funds:  The National Natural Science Foundation of China (61834005), The Natural Science Foundation of Shaanxi Province (2020JM-525), The Science and Technology Project of Yulin City (CXY-2020-026)
  • Received Date: 2022-06-01
  • Rev Recd Date: 2022-10-28
  • Available Online: 2022-11-07
  • Publish Date: 2023-08-21
  • Memristor or Resistive Random Access Memory (ReRAM) is a novel Non-Volatile Memory (NVM) with storage and computing functions, and it is the basic device of non-Von Neumann computer architecture which is Processing In Memory (PIM). To solve the speed mismatch problem between computing speed and storage of reconfigurable array processor, the model of Voltage ThrEshold Adaptive Memristor (VTEAM) is adopted. And through the simulation of Linear Technology Simulation Program with Integrated Circuit Emphasis (LTSPICE), the complete set of Boolean logic is realized. On this basis, a 1T1M memristor cross array is designed, which has the characteristics of simple structure, reconfiguration and high parallelism. Monte Carlo (MC) method is used for tolerance analysis, and the calculation accuracy had reached 0.998. Compared with the existing advanced array, the performance of this array is improved effectively, the processing delay and energy consumption are reduced, and this array can be combined with the reconfigurable array processor to deal with the “memory wall” problem.
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