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Volume 45 Issue 1
Jan.  2023
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CHU Zhufei, PAN Hongyang. Survey on Exact Logic Synthesis Based on Boolean SATisfiability[J]. Journal of Electronics & Information Technology, 2023, 45(1): 14-23. doi: 10.11999/JEIT220391
Citation: CHU Zhufei, PAN Hongyang. Survey on Exact Logic Synthesis Based on Boolean SATisfiability[J]. Journal of Electronics & Information Technology, 2023, 45(1): 14-23. doi: 10.11999/JEIT220391

Survey on Exact Logic Synthesis Based on Boolean SATisfiability

doi: 10.11999/JEIT220391
Funds:  The National Natural Science Foundation of China (61871242), The Open research fund of State Key Laboratory of Application Specific Integrated Circuits and Systems (2021KF008)
  • Received Date: 2022-04-02
  • Rev Recd Date: 2022-08-29
  • Available Online: 2022-09-01
  • Publish Date: 2023-01-17
  • Logic synthesis is a critical step in the Electronic Design Automation(EDA). Traditional global heuristic-based logic synthesis has many challenges as computing power keeps increasing and new computing paradigms emerge. There is a problem with heuristic algorithm in a suboptimal solution. As computing power improving, logic optimization is increasingly pursuing exact solutions rather than suboptimal solutions. First, the logic representations and the Boolean SATisfiability(SAT) problem are briefly described. Then, the research progress of exact synthesis in area optimization and depth optimization of Boolean logic network at two aspects, exact synthesis algorithm and encoding, are introduced. Finally, the future trends in exact synthesis are discussed.
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