An Analog Neuron Circuit for Spiking Convolutional Neural Networks Based on Flash Array

GU Xiaofeng; LIU Yanhang; YU Zhiguo; ZHONG Xiaoyu; CHEN Xuan; SUN Yi; PAN Hongbing

doi:10.11999/JEIT211249

Volume 45 Issue 1

Jan. 2023

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Article Navigation > Journal of Electronics & Information Technology > 2023 > 45(1): 116-124

GU Xiaofeng, LIU Yanhang, YU Zhiguo, ZHONG Xiaoyu, CHEN Xuan, SUN Yi, PAN Hongbing. An Analog Neuron Circuit for Spiking Convolutional Neural Networks Based on Flash Array[J]. Journal of Electronics & Information Technology, 2023, 45(1): 116-124. doi: 10.11999/JEIT211249

Citation:

GU Xiaofeng, LIU Yanhang, YU Zhiguo, ZHONG Xiaoyu, CHEN Xuan, SUN Yi, PAN Hongbing. An Analog Neuron Circuit for Spiking Convolutional Neural Networks Based on Flash Array[J]. Journal of Electronics & Information Technology, 2023, 45(1): 116-124. doi: 10.11999/JEIT211249

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An Analog Neuron Circuit for Spiking Convolutional Neural Networks Based on Flash Array

doi: 10.11999/JEIT211249

1.
Engineering Research Center of Internet of Thing Technology Applications of Ministry of Education, Department of Electronic Engineering, Jiangnan University, Wuxi 214122, China
2.
School of Electronic Science and Engineering, Nanjing University, Nanjing 210023, China

Funds: The Fundamental Research Funds for the Central Universities (JUSRP51510), The Key R&D Program of Jiangsu Province (BE2019003-2)

Received Date: 2021-11-10
Rev Recd Date: 2022-03-24

Available Online: 2022-03-31

Publish Date: 2023-01-17

Abstract

Abstract

In this paper, an Integrate-and-Fire (IF) analog readout neuron circuit is proposed for Spiking Convolutional Neural Network (SCNN) based on flash array. The circuit realizes the following functions: bit line voltage clamping, current readout, current subtraction, and integrate-and-fire. A current readout method is proposed to improve the current readout range and speed by increasing by-pass current. To avoid the loss of array information caused by the traditional analog neuron reset scheme, a reset scheme with subtracting threshold voltage is proposed, which improves the integrity of information and the accuracy of the neural network. The circuit is implemented in 55 nm Complementary Metal Oxide Semiconductor (CMOS) process. Simulation results show that when output current is 20 μA and 0 μA, the read speed can be accelerated 100% and 263.6% respectively; The neuron circuit works well. And test results show that, in the current output range of 0～20 μA, the clamp voltage error is less than 0.2 mV and the fluctuation is less than 0.4 mV; The linearity of current subtraction can reach 99.9%. To study the performance of the analog neuron circuit, LeNet and AlexNet algorithm with circuit model for the recognition of the MNIST and CIFAR-10 database is tested. Test results illustrate that the neural network accuracy is improved by 1.4% and 38.8%.
- Flash,
- Spiking Convolutional Neural Network(SCNN),
- Analog neuron circuit,
- Bit line clamp,
- High-speed readout,
- Reset by subtracting threshold voltage

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References(18)

References

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