Solution of Graph Coloring Problem Based on FPGA

ZHANG Yihao; ZHANG Zichao; LIU Xiaoqing; LENG Huang; WANG Zhiyuan; XU Jin

doi:10.11999/JEIT210646

Volume 44 Issue 9

Sep. 2022

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Article Navigation > Journal of Electronics & Information Technology > 2022 > 44(9): 3328-3334

ZHANG Yihao, ZHANG Zichao, LIU Xiaoqing, LENG Huang, WANG Zhiyuan, XU Jin. Solution of Graph Coloring Problem Based on FPGA[J]. Journal of Electronics & Information Technology, 2022, 44(9): 3328-3334. doi: 10.11999/JEIT210646

Citation:

ZHANG Yihao, ZHANG Zichao, LIU Xiaoqing, LENG Huang, WANG Zhiyuan, XU Jin. Solution of Graph Coloring Problem Based on FPGA[J]. Journal of Electronics & Information Technology, 2022, 44(9): 3328-3334. doi: 10.11999/JEIT210646

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Solution of Graph Coloring Problem Based on FPGA

doi: 10.11999/JEIT210646 cstr: 32379.14.JEIT210646

ZHANG Yihao¹,
ZHANG Zichao¹,
LIU Xiaoqing^{1, 2},
LENG Huang^{1, 2},
WANG Zhiyuan^{3
,
,},
XU Jin^{1, 2}

1.
School of Electronic Engineering and Computer Science, Peking University, Beijing 100871, China
2.
Key Laboratory of High Confidence Software Technologies, Peking University, Beijing 100871, China
3.
Artificial Intelligence Research Center, Defense Innovation Institute, Beijing 100073, China

Funds: The National Key Research and Development Program (2019YFA0706401), The National Natural Science Foundation of China (61632002, 61872166, 61902005, 62002002)

Received Date: 2021-06-25
Accepted Date: 2022-01-20
Rev Recd Date: 2022-02-28

Available Online: 2022-02-19

Publish Date: 2022-09-19

Abstract

Abstract

Graph coloring problem divides the vertices of the graph into disjoint sets and the vertices in each set are assigned by the same color under the constraints that adjacent vertices can not be assigned the same color and the number of colors is the smallest. Since graph coloring problem belongs to the class of NP-complete problems, the complexity for solving the graph coloring problem increases exponentially with the number of vertices. The performance of solving graph coloring problem by general-purpose processors decreases significantly when the number of vertices is large enough. This paper implements a dedicated hardware accelerator for solving graph coloring problem based on Field Programmable Gate Array (FPGA). Firstly, by utilizing the rule of FPGA modular design, the hardware architecture for solving graph coloring problem based on the backtracking is proposed and implemented. Secondly, the relationship between the resource consumption of FPGA and the number of vertices is analyzed. Finally, the general-purpose processor and FPGA can communicate through universal asynchronous transmitter-receiver protocol. The experimental results show that the running time of graph coloring algorithm based on FPGA is about an order of magnitude smaller than that of graph coloring algorithm based on software on general-purpose processors. Besides, the resource consumption of FPGA is linear with the number of vertices and the time consumption at each iteration is independent of the number of vertices.
- Graph coloring problem,
- Backtracking,
- FPGA

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References(22)

References

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