Calculation Optimization for Convolutional Neural Networks and FPGA-based Accelerator Design Using the Parameters Sparsity

LIU Qinrang; LIU Chongyang

doi:10.11999/JEIT170819

Volume 40 Issue 6

May 2018

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Article Navigation > Journal of Electronics & Information Technology > 2018 > 40(6): 1368-1374

LIU Qinrang, LIU Chongyang. Calculation Optimization for Convolutional Neural Networks and FPGA-based Accelerator Design Using the Parameters Sparsity[J]. Journal of Electronics & Information Technology, 2018, 40(6): 1368-1374. doi: 10.11999/JEIT170819

Citation:

LIU Qinrang, LIU Chongyang. Calculation Optimization for Convolutional Neural Networks and FPGA-based Accelerator Design Using the Parameters Sparsity[J]. Journal of Electronics & Information Technology, 2018, 40(6): 1368-1374. doi: 10.11999/JEIT170819

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Calculation Optimization for Convolutional Neural Networks and FPGA-based Accelerator Design Using the Parameters Sparsity

doi: 10.11999/JEIT170819

LIU Qinrang¹,
LIU Chongyang¹

Funds:

The National Science and Technology Major Project of the Ministry of Science and Technology of China (2016ZX01012101), The National Natural Science Foundation of China (61572520, 61521003)

Received Date: 2017-08-21
Rev Recd Date: 2018-01-05
Publish Date: 2018-06-19

Abstract

Abstract

Concerning the problem of real-time restriction on the application of Convolution Neural Network (CNN) in embedded field, and the large degree of sparsity in CNN convolution calculations, this paper proposes an implement method of CNN accelerator based on FPGA to improve computation speed. Firstly, the sparseness characteristics of CNN convolution calculation are seeked out. Secondly, in order to use the parameters sparseness, CNN convolution calculations are converted to matrix multiplication. Finally, the implementation method of parallel matrix multiplier based on FPGA is proposed. Simulation results on the Virtex-7 VC707 FPGA show that the design shortens the calculation time by 19% compared to the traditional CNN accelerator. The method of simplifying the CNN calculation process by sparseness not only can be implemented on FPGA, but also can migrate to other embedded ends.
- Convolution Neural Network (CNN),
- Sparseness,
- Computational optimization,
- Matrix multiplier,
- FPGA

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References(24)

References

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