FPGA-based Soft Error Sensitivity Analysis Method for Microprocessor

LIANG Huaguo; SUN Hongyun; SUN Jun; HUANG Zhengfeng; XU Xiumin; YI Maoxiang; OUYANG Yiming; LU Yingchun; YAN Aibin

doi:10.11999/JEIT160225

Volume 39 Issue 1

Jan. 2017

Turn off MathJax

Article Contents

Article Navigation > Journal of Electronics & Information Technology > 2017 > 39(1): 245-249

LIANG Huaguo, SUN Hongyun, SUN Jun, HUANG Zhengfeng, XU Xiumin, YI Maoxiang, OUYANG Yiming, LU Yingchun, YAN Aibin. FPGA-based Soft Error Sensitivity Analysis Method for Microprocessor[J]. Journal of Electronics & Information Technology, 2017, 39(1): 245-249. doi: 10.11999/JEIT160225

Citation:

LIANG Huaguo, SUN Hongyun, SUN Jun, HUANG Zhengfeng, XU Xiumin, YI Maoxiang, OUYANG Yiming, LU Yingchun, YAN Aibin. FPGA-based Soft Error Sensitivity Analysis Method for Microprocessor[J]. Journal of Electronics & Information Technology, 2017, 39(1): 245-249. doi: 10.11999/JEIT160225

Citation:

LIANG Huaguo, SUN Hongyun, SUN Jun, HUANG Zhengfeng, XU Xiumin, YI Maoxiang, OUYANG Yiming, LU Yingchun, YAN Aibin. FPGA-based Soft Error Sensitivity Analysis Method for Microprocessor[J]. Journal of Electronics & Information Technology, 2017, 39(1): 245-249. doi: 10.11999/JEIT160225

PDF( 819 KB)

FPGA-based Soft Error Sensitivity Analysis Method for Microprocessor

doi: 10.11999/JEIT160225

1.
(School of Electronic Science &
2.
(School of Electronic Science &

Funds:

The National Natural Science Foundation of China (61274036, 61371025, 61474036, 61574052), Anhui Provincial Natural Science Foundation (1608085MF149)

Received Date: 2016-03-11
Rev Recd Date: 2016-07-22
Publish Date: 2017-01-19

Abstract

Abstract

In order to quickly and automatically analyze the soft error sensitivity for microprocessors, a soft error sensitivity analysis method using FPGA-based fault injection is proposed. The fault and fault-free microprocessors on a FPGA are board run simultaneously. Moreover, a fault injection controller, a fault classification module and a fault list module are also implemented on the hardware. The method inherits the parallelism of the FPGA and achieves a fast and automatical fault injection for all storage bits. Further, using a PIC16F54 microprocessor as experimental subject, approximate 300, 000 soft errors are injected into the microprocessors to analyze its soft error sensitivity. In order to demonstrate the sensitivity evaluation efficiency of the method, the quite sensitive storage cells are hardened and the sensitivity is analyzed again. Compared to the simulation approach, experimental results show that the proposed technique achieves four orders of magnitude speedup.
- FPGA,
- Fault injection,
- Single event upset,
- Soft error,
- Sensitivity analysis

FullText(HTML)

References(20)

References

CLARK J and PRADHAN D. Fault injection: a method for validating computer-system dependability[J]. Computer, 1995, 28(6): 47-56. doi: 10.1109/2.386985.

孙峻朝, 王建莹, 杨孝宗. 故障注入方法与工具的研究现状[J]. 宇航学报, 2001, 22(1): 99-104.

SUN Junzhao, WANG Jianying, and YANG Xiaozong. The present situation for research of fault injection methodology and tools[J]. Journal of Astronautics, 2001, 22(1): 99-104.

KARLSSON J, FOLKESSON P, ARLAT J, et al. Application of three physical fault injection techniques to the experimental assessment of the MARS architecture[C]. Proceedings of 5th IFIP Working Conference on Dependable Computing for Critical Applications, Urbana-Champaign, IL, 1995, (10): 267-287.

GAISLER J. A portable and fault-tolerant microprocessor based on the SPARC V8 architecture[C]. International Conference on Dependable Systems and Networks, Washington, D.C., 2002: 409-415.

黄海林, 唐志敏, 许彤. 龙芯1号处理器的故障注入方法与软错误敏感性分析[J]. 计算机研究与发展, 2006, 43(10): 1820-1827.

HUANG Hailin, TANG Zhimin, and XU Tong. Fault injection and soft error sensitivity characterization for fault-tolerant Godson-1 processor[J]. Journal of Computer Research and Development, 2006, 43(10): 1820-1827.

武振平, 付方发, 肖立伊. 基于VHDL故障注入的处理器敏感性分析[J]. 微电子学与计算机, 2012, 29(10): 51-55.

WU Zhenping, FU Fangfa, and XIAO Liyi. Sensitivity analysis for processor based on VHDL fault injection[J]. Microelectronics Computer, 2012, 29(10): 51-55.

吴杰. 基于VHDL的故障注入工具的研究与实现[D]. [硕士论文], 哈尔滨工业大学, 2013.

WU Jie. Research and implementation of VHDL-based fault injection tool[D]. [MsSter. dissertation], Harbin Institute of Technology, 2013.

ADMANE N and ROTAKE D. Fault tolerant system for FPGA using simulation based fault injection technique[C]. 2015 International Conference on Communications and Signal Processing, Melmaruvathur, 2015: 0855-0859.

薛茜男, 李振, 姜承翔, 等. 面向航空环境的多时钟单粒子翻转故障注入方法[J]. 电子与信息学报, 2014, 36(6): 1504-1508. doi: 10.3724/SP.J.1146.2013.01296

XUE Qiannan, LI Zhen, JIANG Chengxiang, et al. A single event upset fault injection method based on multi-clock for aviation environment[J]. Journal of Electronics Information Technology, 2014, 36(6): 1504-1508. doi: 10.3724/ SP.J.1146.2013.01296

SERRANO F, CLEMENTE J, and MECHA H. A methodology to emulate single event upsets in flip-flops using FPGAs through partial reconfiguration and instrumentation [J]. IEEE Transactions on Nuclear Science, 2015, 62(4): 1617-1624. doi: 10.1109/TNS.2015.2447391.

SHOBANA M and SENTHIL S. Reconfigurable data processing using duplex fault tolerance system[C]. 2015 International Conference on Innovations in Information, Embedded and Communication Systems, Coimbatore, 2015: 1-5. doi: 10.1109/ICIIECS.2015.7192935.

EBRAHIMI M, MOHAMMADI A, EJLALI A, et al. A fast, flexible, and easy-to-develop FPGA-based fault injection technique[J]. Microelectronics Reliability, 2014, 54(5): 1000-1008. doi: 10.1109/DATE.2012.6176538.

MOHAMMADI A, EBRAHIMI M, EJLALI A, et al. SCFIT: A FPGA-based fault injection technique for SEU fault model[C]. Design, Automation amp; Test in Europe Conference amp; Exhibition, Dresden, 2012: 586-589. doi: 10.1109/DATE.2012.6176538.

CIVERA P, MACCHIARULO L, REBAUDENGO M, et al. FPGA-based fault injection techniques for fast evaluation of fault tolerance in VLSI circuits[C]. Field-Programmable Logic and Applications, Berlin Heidelberg, 2001: 493-502.

SHOKROLAH-SHIRAZI M and MIREMADI S. FPGA- based fault injection into synthesizable verilog HDL models [C]. Secure System Integration and Reliability Improvement, Yokohama, 2008: 143-149.

Relative Articles

Supplements(0)

Cited By

Proportional views