基于FPGA的数字化正交解调接收机最优设计
Optimization Design of Digital Quadrature Demodulation Receiver Based on FPGA
-
摘要: 结合抽取滤波器的多项滤波结构，在一定条件下，推导出了一种含抽取正交解调接收机最优结构设计方法。在FPGA乘法器资源相同的条件下，采用最优结构设计的接收机内部FIR滤波器阶数比直接实现形式高了近4倍。最后给出了设计实例。
-
关键词:
- 正交解调;FPGA;多项滤波
Abstract: Under certain conditions, combining the polyphase filtering structure of decimation filter, put forward an optimum design method of quadrature demodulation receiver, which owns decimation structure. With the same number of multipliers in FPGA, the order of FIR filter in receiver with above optimum structure is nearly 4 times than it implemented in direct way. Finally the design instance is given. -
计量
- 文章访问数: 2561
- HTML全文浏览量: 100
- PDF下载量: 1816
- 被引次数: 0
下载:
