Design of Adiabatic Non-integer Division Circuit Based on the 2N-2N2P Structure

万栋义主编. 脉冲与数字电路. 北京：高等教育出版社, 1989, 333-361.[2]吴训威, 杭国强. 绝热计算原理与能量恢复型CMOS电路. 计算机学报, 2000, 2(7): 779-784.[3]方振贤, 汪鹏君, 刘莹. 绝热电路稳定性和三相时钟同步时序电路. 电路与系统学报, 2003, 8(4): 123-127.[4]Ng K W, Lau K T. Low power flip-flop design based on PAL-2N structure[J].Microelectronics Journal.2000, 31(2):113-116[5]Ng K W, Lau K T. ECRL-based low power flip-flop design[J].Microelectronics Journal.2000, 31(5):365-370[6]吴训威, 韦健, Pedram M. Low power design of sequential circuits using a quasi-synchronous derived clock. Proceedings of ASP-DAC, Yokohama, Japan, Jan. 2000, 345-350.[7]吴训威, Pedram M. Low power design on sequential circuits using T flip-flops[J].Int. J. Electronics.2001, 88(6):635-643[8]方振贤, 汪鹏君, 刘莹. 二值、多值和绝热电路通用的电路理论. 电子学报, 2003, 31(2): 303-305.[9]李晓民, 仇玉林, 陈潮枢. 低电压Charge-Recovery 逻辑电路设计. 半导体学报, 2001, 22(10): 1352-1356.[10]Kramer A, Denker J S, Flower B, Moroney J. 2ND order adiabatic computation with 2N-2P and 2N-2N2P logic circuits. Proceedings of the International symposium on Low Power design, Data point, California, USA, April 1995, 191-196.[11]刘莹, 方振贤. 静态绝热CMOS记忆电路和信息恢复能力. 半导体学报, 2002, 23(12): 1326-1331.