IMPLEMENTATION OF THE CORRECTOR OF ERRORS IN I Q CHANNELS WITH DSP

This paper describes the implementation of the corrector of I Q errors in coherent processor. The correcting network consists of combination logic circuit and it can correct the gain and phase imbalances and the bias errors of the in-phase and quadrature channels in coherent signal processing. The correcting coefficients are computed with DSP using a test signal. The image level without correction is about -27dB if the errors of gain and phase in the coherent processor are 0.1dB and 5 respectively. The experimental results show that the image level is reduced to -52dB from -27dB after correcting the errors.