STATE TRANSITION REDUNDANCE IDENTIFICATION

He Xinhua; Cai Hongliu; Wang Weifeng

Volume 21 Issue 1

Jan. 1999

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Article Navigation > Journal of Electronics & Information Technology > 1999 > 21(1): 141-144

He Xinhua, Cai Hongliu, Wang Weifeng. STATE TRANSITION REDUNDANCE IDENTIFICATION[J]. Journal of Electronics & Information Technology, 1999, 21(1): 141-144.

Citation:

He Xinhua, Cai Hongliu, Wang Weifeng. STATE TRANSITION REDUNDANCE IDENTIFICATION[J]. Journal of Electronics & Information Technology, 1999, 21(1): 141-144.

He Xinhua, Cai Hongliu, Wang Weifeng. STATE TRANSITION REDUNDANCE IDENTIFICATION[J]. Journal of Electronics & Information Technology, 1999, 21(1): 141-144.

Citation:

He Xinhua, Cai Hongliu, Wang Weifeng. STATE TRANSITION REDUNDANCE IDENTIFICATION[J]. Journal of Electronics & Information Technology, 1999, 21(1): 141-144.

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STATE TRANSITION REDUNDANCE IDENTIFICATION

Received Date: 1996-05-14
Rev Recd Date: 1998-01-14
Publish Date: 1999-01-19

Abstract

Abstract

The BDD (Binary Decision Diagram) is very important for representing synchronous circuits. After analyzing and reducing the BDD, the state traversing is proposed on the basis of collapsing of input, routes and states on STG. Finally, the verification for the non-reset circuits has been described.

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References(1)

References

Cho H, Hachteland G D. Fast sequential ATPG based on implicit state enumeration. ITC91 1991, 67-74.[2]Calazans N. Advanced ordered and manipulation tecniques for BDD. DA92, 1992, 452-457.

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