Leakage Current Optimization for FPGA Switch Matrixes Based on Routing Architecture

From the perspective of routing architecture, a leakage reduction method of switch matrixes in FPGA is proposed. Based on the conclusion of state-dependent leakage, the lowest leakage current of switch matrixes in FPGA is equivalently computed in a small size of matrix cell using the transition property of SWitch Box (SWB). Because the presented algorithm could research the lowest leakage state in finite SWB output state combinations, rather than confirming SWB output state by level-restoring circuit, the algorithm is used for efficient reduction of leakage in switch matrixes and is compatible with the optimization of leakage at the circuit-level.