Wang Chen-Xu, Li Jing-Hu, Yu Ming-Yan, Wang Jin-Xiang. Power Analysis Security Evaluation on Piccolo Based on FPGA Platform[J]. Journal of Electronics & Information Technology, 2014, 36(1): 101-107. doi: 10.3724/SP.J.1146.2013.00193
Citation:
Wang Chen-Xu, Li Jing-Hu, Yu Ming-Yan, Wang Jin-Xiang. Power Analysis Security Evaluation on Piccolo Based on FPGA Platform[J]. Journal of Electronics & Information Technology, 2014, 36(1): 101-107. doi: 10.3724/SP.J.1146.2013.00193
Wang Chen-Xu, Li Jing-Hu, Yu Ming-Yan, Wang Jin-Xiang. Power Analysis Security Evaluation on Piccolo Based on FPGA Platform[J]. Journal of Electronics & Information Technology, 2014, 36(1): 101-107. doi: 10.3724/SP.J.1146.2013.00193
Citation:
Wang Chen-Xu, Li Jing-Hu, Yu Ming-Yan, Wang Jin-Xiang. Power Analysis Security Evaluation on Piccolo Based on FPGA Platform[J]. Journal of Electronics & Information Technology, 2014, 36(1): 101-107. doi: 10.3724/SP.J.1146.2013.00193
To evaluate Piccolos security against Power Analysis Attack (PAA), a cipher text attack model is proposed and Correlation Power Analysis (CPA) is conducted on this cipher implementation with measured power traces based on Side-channel Attack Standard Evaluation BOard (SASEBO). Due to the whiten keys for the final round of Piccolo, attacked keys including RK24L, RK24R, WK2 and WK3 are divided into four sub-keys, which are disclosed one by one. This approach can reduce the 80-bit primary key search space from 280 to (2220+2212+216) and make it possible to recover the primary key. The attack results show that 3000 measured power traces are enough to recover Piccolos 80-bit primary key, which proves the attack models feasibility and Piccolos vulnerability to CPA against its hardware implementation. So, some countermeasures should be used for Piccolos hardware implementation.