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Volume 31 Issue 2
Dec.  2010
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Qiu Xin, Zhang Hao, Qi Zhong-rui, Liu Yi, Chen Jie. An Architecture and VLSI Implementation for Adaptive Reed-Solomon Decoder[J]. Journal of Electronics & Information Technology, 2009, 31(2): 484-488. doi: 10.3724/SP.J.1146.2007.01279
Citation: Qiu Xin, Zhang Hao, Qi Zhong-rui, Liu Yi, Chen Jie. An Architecture and VLSI Implementation for Adaptive Reed-Solomon Decoder[J]. Journal of Electronics & Information Technology, 2009, 31(2): 484-488. doi: 10.3724/SP.J.1146.2007.01279

An Architecture and VLSI Implementation for Adaptive Reed-Solomon Decoder

doi: 10.3724/SP.J.1146.2007.01279
  • Received Date: 2007-08-03
  • Rev Recd Date: 2008-03-31
  • Publish Date: 2009-02-19
  • This paper proposes the architecture of an adaptive Reed-Solomon (RS) decoder. This adaptive decoder can decode shorten RS code with variable block length as well as variable message length. The proposed RS decoder is independent of the interval of codeword block. Consequently, it can work not only in a burst mode, but also in a continuous mode. Further, this decoder can provide the integrity of interval information between codeword blocks, thus satisfying the requirements of special services in wireless communication and Ethernet. The VLSI implementation of a RS (255,239) decoder is also presented, which is based on the architecture of the adaptive RS decoder. This adaptive RS decoder has been designed and implemented with TSMC 0.18 COMS technology. The testing results validate the function of the adaptive RS decoder. The port rate is up to 1.6Gb/s.
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