Flexible Network Modal Packet Processing Pipeline Construction Mechanism for Cloud-Network Convergence Environment

ZHU Jun; XU Qi; ZHANG Fujun; WANG Yongjie; ZOU Tao; LONG Keping

doi:10.11999/JEIT250806

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ZHU Jun, XU Qi, ZHANG Fujun, WANG Yongjie, ZOU Tao, LONG Keping. Flexible Network Modal Packet Processing Pipeline Construction Mechanism for Cloud-Network Convergence Environment[J]. Journal of Electronics & Information Technology. doi: 10.11999/JEIT250806

Citation:

ZHU Jun, XU Qi, ZHANG Fujun, WANG Yongjie, ZOU Tao, LONG Keping. Flexible Network Modal Packet Processing Pipeline Construction Mechanism for Cloud-Network Convergence Environment[J]. Journal of Electronics & Information Technology. doi: 10.11999/JEIT250806

Citation:

ZHU Jun, XU Qi, ZHANG Fujun, WANG Yongjie, ZOU Tao, LONG Keping. Flexible Network Modal Packet Processing Pipeline Construction Mechanism for Cloud-Network Convergence Environment[J]. Journal of Electronics & Information Technology. doi: 10.11999/JEIT250806

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Flexible Network Modal Packet Processing Pipeline Construction Mechanism for Cloud-Network Convergence Environment

doi: 10.11999/JEIT250806 cstr: 32379.14.JEIT250806

Research Center for High Efficiency Computing Facilities, Zhejiang Lab, Hangzhou 311121, China

Funds: National Natural Science Foundation of China (U22A2005), Key R&D Program of Zhejiang (2024SSYS0001)

Received Date: 2025-08-27
Accepted Date: 2025-11-03
Rev Recd Date: 2025-11-03

Available Online: 2025-11-11

Abstract

Abstract

Objective With the deep integration of information network technologies and vertical application fields, the demand for cloud-network convergence infrastructure has become increasingly prominent, and the boundaries between cloud computing and network technologies are becoming more blurred. The development of cloud-network convergence technologies has given rise to diverse network service requirements, further posing new challenges for the flexible processing of multi-modal network packets. The device-level network modal packet processing flexible pipeline construction mechanism is key to realizing an integrated environment that supports a variety of network technologies. This mechanism constructs a protocol packet processing flexible pipeline architecture that, based on different network modals and service demands, customizes a series of protocol packet processing operations, including packet parsing, packet editing, and packet forwarding, thus improving the adaptability of networks in cloud-network convergence environments. This flexible design allows the pipeline processing flow to be adjusted according to actual service demands, meeting the functional and performance requirements of different network transmission scenarios. Methods The construction of a device-level flexible pipeline faces two major challenges: (1) how to flexibly process diverse network modal packet protocols based on polymorphic network element devices, requiring coordination of various heterogeneous resources to quickly identify, parse, and correctly handle network modal packets in various formats; (2) how to ensure that the pipeline construction is flexible, providing a mechanism to dynamically generate and configure pipeline structures. This mechanism should not only adjust the number of stages in the pipeline but also allow customization of the specific functions of each stage. To address these challenges, this paper proposes a polymorphic network element abstraction model that integrates heterogeneous resources. It employs a hyper-converged approach using high-performance switching ASIC chips paired with more programmable but slightly weaker FPGA and CPU devices at the device-level hardware architecture layer. Through the synergy of hardware and software, it meets the flexibility demands for unified support of custom network protocols. On the basis of the network element abstraction model, a protocol packet flexible processing compilation mechanism is further designed, constructing a flexible pipeline architecture that supports customizable configurations to accommodate different network service transmission requirements. It is a front-end, mid-end, back-end three-stage compilation architecture. At the same time, in response to the adaptive issues between differentiated network modal demands and heterogeneous resources, a flexible pipeline technology based on IR slicing is proposed. This approach precisely decomposes and reconstructs the integrated IR of multiple network modals into several IR subsets according to specific optimization methods, ensuring the original functionality and semantics, thus enabling flexible customization of the network modal processing pipeline through collaborative handling of heterogeneous resources. By utilizing an intermediate representation slicing algorithm, this mechanism decomposes and maps hybrid processing logic of multiple network modalities onto heterogeneous hardware resources such as ASICs, FPGAs, and CPUs, thereby constructing a custom-configurable flexible pipeline that adapts to various network service transmission requirements. Results and Discussions To demonstrate the construction effect of the flexible pipeline, this paper introduces a prototype verification system for polymorphic network elements. As shown in Fig. 6, the system is equipped with Centec CTC8180 switch chips, multiple domestic FPGA chips, and domestic multi-core CPU chips. On this polymorphic network element prototype verification system, protocol processing pipelines for IPv4, GEO, and MF network modals were constructed, compiled, and deployed. As shown in Fig. 7, actual packet capture tests have verified that different network modals use different packet processing pipelines. To validate the core mechanism of network modal flexible pipeline construction, we compared the IR code size before and after slicing under the three network modals and network modal allocation strategies in Section 6.2. The integrated P4 code for the three network modals, after front-end compilation, produced an unsliced intermediate code of 32,717 lines. According to the modal allocation scheme, slicing was performed during the middle-end compilation stage, resulting in IR slices for ASIC, CPU, and FPGA with code sizes of 23,164, 23,282, and 22,772 lines, respectively. Finally, the performance of multi-modal protocol packet processing was evaluated, focusing on the impact of different traffic allocation schemes on the network modal protocol packet processing performance. According to the experimental results in Fig. 9, it can be observed that the average packet processing delay for Scheme 1 is significantly higher than the other schemes, reaching 4.237 milliseconds. In contrast, the average forwarding processing delay for Schemes 2, 3, and 4 decreased to 54.16 microseconds, 32.63 microseconds, and 15.48 microseconds, respectively. This shows that with changes in the traffic allocation strategy, especially the adjustment of CPU resources for GEO and MF modals, network packet processing bottlenecks can be effectively reduced, thereby significantly improving multi-modal network communication efficiency. Conclusions Experimental evaluations confirm the superiority of the proposed flexible pipeline in terms of construction effects and functional fulfillment. The results show that the proposed method can effectively address complex network environments and diverse service demands, demonstrating strong performance. Future work will further optimize this architecture and expand its applicability, aiming to provide more powerful and flexible technical support for network packet processing in hyper-converged cloud-network environments.
- Polymorphic networks,
- Protocol packet processing,
- Network programmability,
- Network resource allocation and orchestration

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References(14)

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