Single Event Transient Analysis and Hardening in a Low-Dropout Regulator

SHEN Fan; CHEN Jianjun; CHI Yaqing; LIANG Bin; WANG Xun; WEN Yi; GUO Hao

doi:10.11999/JEIT230438

Volume 45 Issue 11

Nov. 2023

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Article Navigation > Journal of Electronics & Information Technology > 2023 > 45(11): 3965-3972

SHEN Fan, CHEN Jianjun, CHI Yaqing, LIANG Bin, WANG Xun, WEN Yi, GUO Hao. Single Event Transient Analysis and Hardening in a Low-Dropout Regulator[J]. Journal of Electronics & Information Technology, 2023, 45(11): 3965-3972. doi: 10.11999/JEIT230438

Citation:

SHEN Fan, CHEN Jianjun, CHI Yaqing, LIANG Bin, WANG Xun, WEN Yi, GUO Hao. Single Event Transient Analysis and Hardening in a Low-Dropout Regulator[J]. Journal of Electronics & Information Technology, 2023, 45(11): 3965-3972. doi: 10.11999/JEIT230438

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Single Event Transient Analysis and Hardening in a Low-Dropout Regulator

doi: 10.11999/JEIT230438 cstr: 32379.14.JEIT230438

1.
College of Computer Science and Technology, National University of Defense Technology, Changsha 410073, China
2.
College of Civil Engineering, Tongji University, Shanghai 200092, China

Funds: The National Natural Science Foundation of China (61974163, 62174180)

Received Date: 2023-05-17
Rev Recd Date: 2023-09-08

Available Online: 2023-09-13

Publish Date: 2023-11-28

Abstract

Abstract

As the feature size of integrated circuits scales down, the problem of the Single Event Transients (SET) in CMOS integrated circuits is becoming more and more serious. In order to improve the hardening effect of the Low-DropOut regulators (LDO), the mechanism of the SET in a LDO fabricated on 28 nm CMOS technology is studied by SPICE circuit simulation and heavy ion experiment. The influence of the size of the key components on the SET in LDO is also studied. The hardening methods for LDO is proposed. The SPICE circuit simulation results show that the most sensitive nodes are located in the Error Amplifier (EA). The equivalent capacitance on the gate node of the power MOSFET can significantly influence the amplitude of the single event transients and slightly influence the width. The size of the relevant devices in the error amplifier can influence both amplitude and width of the SETs. The LDO is hardened by adding the capacitance on the gate node of power MOSFET and adjusting the size of the relevant devices in the error amplifier. The results of the simulation and the experiment show that the hardening method can significantly decrease the amplitude and width of the SETs.
- Single Event Transient (SET),
- Low-DropOut regulator (LDO),
- Heavy ion experiment,
- SPICE circuit simulation,
- 28 nm CMOS technology

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References(22)

References

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