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Volume 43 Issue 9
Sep.  2021
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Xiaotong CUI, Weirong QIN, Kefei CHENG, Yu WU. The Vulnerability Analysis of Design-for-trust Technique and Its Defense[J]. Journal of Electronics & Information Technology, 2021, 43(9): 2482-2488. doi: 10.11999/JEIT210624
Citation: Xiaotong CUI, Weirong QIN, Kefei CHENG, Yu WU. The Vulnerability Analysis of Design-for-trust Technique and Its Defense[J]. Journal of Electronics & Information Technology, 2021, 43(9): 2482-2488. doi: 10.11999/JEIT210624

The Vulnerability Analysis of Design-for-trust Technique and Its Defense

doi: 10.11999/JEIT210624
Funds:  The Science and Technology Research Program of Chongqing Municipal Education Commission (KJQN201900641), The State Key Laboratory of Computer Architecture Research Fund (CARCH201902), The State Key Laboratory of Vehicle NVH and Safety Technology Research Fund (NVHSKL-202114)
  • Received Date: 2021-06-28
  • Rev Recd Date: 2021-08-12
  • Available Online: 2021-08-27
  • Publish Date: 2021-09-16
  • System-on-Chip (SoC) designers typically use third Party Intellectual Property(3PIP) cores to implement target functions. As these 3PIP cores are not trusted, the underlying SoC suffers from the threat of Hardware Trojans(HTs). As a subset of design-for-trust techniques, the diversified redundancy is promising in establishing trustworthy computings of SoCs. However, It is shown that the diversified redundancy can be defeated by HTs that explores triggering patterns. Therefore, an adapted diversified redundancy technique is proposed to defend against such kind of attacks.
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