Key Technology and Development of Triple Modular Redundancy Tool for FPGA

CHEN Lei; ZHANG Yaowei; WANG Shuo; ZHOU Jing; TIAN Chunsheng; PANG Yongjiang; MA Xiaojing; ZHOU Chong; DU Zhong

doi:10.11999/JEIT210330

Volume 44 Issue 6

Jun. 2022

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Article Navigation > Journal of Electronics & Information Technology > 2022 > 44(6): 2230-2244

CHEN Lei, ZHANG Yaowei, WANG Shuo, ZHOU Jing, TIAN Chunsheng, PANG Yongjiang, MA Xiaojing, ZHOU Chong, DU Zhong. Key Technology and Development of Triple Modular Redundancy Tool for FPGA[J]. Journal of Electronics & Information Technology, 2022, 44(6): 2230-2244. doi: 10.11999/JEIT210330

Citation:

CHEN Lei, ZHANG Yaowei, WANG Shuo, ZHOU Jing, TIAN Chunsheng, PANG Yongjiang, MA Xiaojing, ZHOU Chong, DU Zhong. Key Technology and Development of Triple Modular Redundancy Tool for FPGA[J]. Journal of Electronics & Information Technology, 2022, 44(6): 2230-2244. doi: 10.11999/JEIT210330

Citation:

CHEN Lei, ZHANG Yaowei, WANG Shuo, ZHOU Jing, TIAN Chunsheng, PANG Yongjiang, MA Xiaojing, ZHOU Chong, DU Zhong. Key Technology and Development of Triple Modular Redundancy Tool for FPGA[J]. Journal of Electronics & Information Technology, 2022, 44(6): 2230-2244. doi: 10.11999/JEIT210330

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Key Technology and Development of Triple Modular Redundancy Tool for FPGA

doi: 10.11999/JEIT210330

1.
Beijing Microelectronics Technology Institute, Beijing 100076, China
2.
School of Electronics Engineering and Computer Science, Peking University, Beijing 100871, China

Funds: The National Science and Technology Major Project (2009ZYHJ0005)

Received Date: 2021-04-20
Rev Recd Date: 2022-03-23

Available Online: 2022-04-12

Publish Date: 2022-06-21

Abstract

Abstract

SRAM-based FPGAs are sensitive to single event effect in space radiation environment, resulting in soft errors. Triple Modular Redundancy (TMR) is the most widely used circuit hardening technology to alleviate FPGA soft errors. This paper introduces first the current research status of TMR technology, and then summarizes four key technologies and their implementation principles of fine-grained TMR technology, system partitioning technology, configuration scrubbing technology and state synchronization technology, which are commonly used in TMR tools. As the high-level synthesis technology of FPGA becomes more and more mature, the TMR tools based on high level synthesis have gradually become a new research branch. The current mainstream TMR tools based on the register transfer level, TMR tools based on important soft-core resources, and the emerging TMR tools based on high-level synthesis are classified and introduced. Finally, the future development trend of TMR tool for FPGA is summarized and forecasted.
- Field Programmable Gate Array (FPGA),
- Single event effect,
- Software,
- Triple Modular Redundancy (TMR),
- High level synthesis

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References(47)

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