Energy Efficiency Model and Mapping Algorithm of Block Cipher for Cipher Specific Programmable Logic Array

Wei LI; Jiahao GAO; Yiran DU; Tao CHEN

doi:10.11999/JEIT200079

Volume 43 Issue 5

May 2021

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Wei LI, Jiahao GAO, Yiran DU, Tao CHEN. Energy Efficiency Model and Mapping Algorithm of Block Cipher for Cipher Specific Programmable Logic Array[J]. Journal of Electronics & Information Technology, 2021, 43(5): 1372-1380. doi: 10.11999/JEIT200079

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Wei LI, Jiahao GAO, Yiran DU, Tao CHEN. Energy Efficiency Model and Mapping Algorithm of Block Cipher for Cipher Specific Programmable Logic Array[J]. Journal of Electronics & Information Technology, 2021, 43(5): 1372-1380. doi: 10.11999/JEIT200079

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Energy Efficiency Model and Mapping Algorithm of Block Cipher for Cipher Specific Programmable Logic Array

doi: 10.11999/JEIT200079

Strategic Support Force Information Engineering University, Zhengzhou 450001, China

Received Date: 2020-01-19
Rev Recd Date: 2020-06-15

Available Online: 2020-07-24

Publish Date: 2021-05-18

Abstract

Abstract

Cipher Specific Programmable Logic Array (CSPLA) is a data stream-driven cryptographic processing structure. The relations between cryptographic mapping energy efficiency and array structures of different scales is considered in this paper. First, based on the specific hardware structure of CSPLA and block ciphers, an energy efficiency model of block cipher algorithm mapping based on this structure is established and related factors affecting energy efficiency are analyzed. Then the basic process of algorithm mapping on the array structure is discussed and a mapping algorithm is proposed. Finally, several typical block cipher algorithms are selected to perform mapping experiments on arrays of different scales. The results show that larger scale CSPLA does not necessarily bring higher energy efficiency. When the CSPLA scale is about 4×4～4×6 which achieves the best energy efficiency. In order to obtain the best energy efficiency, the scale parameter of the array should match the specific hardware resource constraints and cryptographic algorithm parameters. The optimal energy efficiency of AES algorithm is 33.68 Mbps/mW. CSPLA has better energy efficiency characteristics compared with other cryptographic processing structures.
- Cipher Specific Programmable Logic Array (CSPLA),
- Block cipher,
- Energy efficiency,
- Mapping

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References(16)

References

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