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Volume 42 Issue 6
Jun.  2020
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Luhui WANG, Yue WANG, Mengyao QIAN, Yafei DONG. Logical Model Design and Controllability Verification Based on Graphene Oxide and Metal Ions[J]. Journal of Electronics & Information Technology, 2020, 42(6): 1410-1419. doi: 10.11999/JEIT190872
Citation: Luhui WANG, Yue WANG, Mengyao QIAN, Yafei DONG. Logical Model Design and Controllability Verification Based on Graphene Oxide and Metal Ions[J]. Journal of Electronics & Information Technology, 2020, 42(6): 1410-1419. doi: 10.11999/JEIT190872

Logical Model Design and Controllability Verification Based on Graphene Oxide and Metal Ions

doi: 10.11999/JEIT190872
Funds:  The National Natural Science Foundation of China (61572302), The Basic Research Plan of Natural Science of Shaanxi Province(2020JM-298), The Free Exploration Project for Doctoral Students of Shaanxi Normal University (2019TS075)
  • Received Date: 2019-11-04
  • Rev Recd Date: 2020-04-16
  • Available Online: 2020-05-12
  • Publish Date: 2020-06-22
  • As a new subject born at the end of the 20th century, biological computing has become a hot spot of frontier scientific research. Similar to the electronic computer, the construction of biological computer needs a variety of molecular logic gates, and the introduction of Graphene Oxide(GO), heavy metal ion heavy metal particles and other substances with biochemical characteristics into the design of molecular logic gates is expected to put forward new ideas for research. In addition, molecular logic gates should be realized at the level of biological experiments, which requires the study of controllability and controllable range of various conditions of biological experiments. Based on this idea, several logic gates are designed based on graphene oxide and metal ions. The feasibility is verified by simulation experiment, electrophoresis experiment, orthogonal experiment, fluorescence experiment, etc. At the same time, the controllability and controllable range of the experiment are further researched. On the one hand, the feasibility of the designed logic gate is proved, on the other hand, it be found that can be applied to actual samples.
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