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Volume 42 Issue 4
Jun.  2020
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Guangyi WANG, Shuhang SHEN, Gongzhi LIU, Fupeng LI. Design of Memristor Based Multiplier Circuits[J]. Journal of Electronics & Information Technology, 2020, 42(4): 827-834. doi: 10.11999/JEIT190811
Citation: Guangyi WANG, Shuhang SHEN, Gongzhi LIU, Fupeng LI. Design of Memristor Based Multiplier Circuits[J]. Journal of Electronics & Information Technology, 2020, 42(4): 827-834. doi: 10.11999/JEIT190811

Design of Memristor Based Multiplier Circuits

doi: 10.11999/JEIT190811
Funds:  The National Natural Science Foundation of China (61771176, 61801154)
  • Received Date: 2019-10-18
  • Rev Recd Date: 2020-01-19
  • Available Online: 2020-02-25
  • Publish Date: 2020-06-04
  • As a new non-volatile electronic device, memristor has a good application prospect in digital logic circuits. At present, memristor based logic circuits mainly involve the research of full adder, multiplier, exclusive-OR (XOR) and equivalence (XNOR), etc., among which there is little research on memristor based multiplier. The 2-bit binary multiplier circuit is designed in two different ways based on memristor. One is to design a 2-bit binary multiplier circuit by using the improved XOR and AND multifunctional logic modules. The other is to design a 2-bit binary multiplier by combining a new type of ratio logic, i.e. a unit gate circuit consisting of one memristor and one NMOS transistor. The two multipliers are compared and validated by LTSPICS simulation. The multiplier designed in this paper only uses 2 N-Metal-Oxide-Semiconductor (NMOS) and 18 memristors (the other is 6 NMOS and 28 memristors). Compared with previous memristor based multipliers, the multipliers in this paper reduce the number of transistors.
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