Design and Implementation of High Speed PCIe Cipher Card Supporting GM Algorithms

Jun ZHAO; Xuewen ZENG; Zhichuan GUO

doi:10.11999/JEIT190003

Volume 41 Issue 10

Oct. 2019

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Article Navigation > Journal of Electronics & Information Technology > 2019 > 41(10): 2402-2408

Jun ZHAO, Xuewen ZENG, Zhichuan GUO. Design and Implementation of High Speed PCIe Cipher Card Supporting GM Algorithms[J]. Journal of Electronics & Information Technology, 2019, 41(10): 2402-2408. doi: 10.11999/JEIT190003

Citation:

Jun ZHAO, Xuewen ZENG, Zhichuan GUO. Design and Implementation of High Speed PCIe Cipher Card Supporting GM Algorithms[J]. Journal of Electronics & Information Technology, 2019, 41(10): 2402-2408. doi: 10.11999/JEIT190003

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Design and Implementation of High Speed PCIe Cipher Card Supporting GM Algorithms

doi: 10.11999/JEIT190003

Jun ZHAO^{1, 2},
Xuewen ZENG^{1, 2, 3
,
,},
Zhichuan GUO^{1, 2, 3}

1.
National Network New Media Engineering Research Center, Institute of Acoustics, Chinese Academy of Sciences, Beijing 100190, China
2.
School of Electronic, Electrical and Communication Engineering, University of Chinese Academy of Sciences, Beijing 100190, China
3.
Beijing Zhongke Vision Cloud Technology Co., Ltd., Beijing 100190, China

Funds: Strategic Priority Research Program of the Chinese Academy of Sciences(XDC02010701)

Received Date: 2019-01-03
Available Online: 2019-04-25
Publish Date: 2019-10-01

Abstract

Abstract

Cipher cards play an important role in the field of information security. However, the performance of cipher cards are insufficient, and it is difficult to meet the needs of high-speed network security services. A design and system implementation method of high-speed PCIe cipher card based on MIPS64 multi-core processor is proposed, which supports the GM algorithm SM2/3/4 and international cryptographic algorithms, such as RSA, SHA and AES. The implemented system includes module of hardware, cryptographic algorithm, host driver and interface calling. An optimization scheme for the implementation of SM3 is proposed, the performance is improved by 19%. And the host to send requests in Non-Blocking mode is supported, so a single-process application can get the cipher card’s full load performance. Under 10-core CPU, the speed of SM2 signature and verification are 18000 and 4200 times/s, SM3 hash speed is 2200 Mbps, SM4 encryption/decryption speed is 8/10 Gbps, multiple indicators achieve higher level; When using 16-core CPU @1300 MHz, SM2/3 performance can be improved by more than 100%, and the speed of SM2 signature could achieve 10⁵ times/s with 48-core CPU.
- Cipher card,
- PCIe bus,
- GM algorithm,
- Non-Blocking

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References(24)

References

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