Design of Finite Field FFT for Fully Homomorphic Encryption Based on FPGA

SHI Quan; HAN Saifei; HUANG Xinming; SUN Ling; XIE Xing; TANG Tianze

doi:10.11999/JEIT170312

Volume 40 Issue 1

Jan. 2018

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Article Navigation > Journal of Electronics & Information Technology > 2018 > 40(1): 57-62

SHI Quan, HAN Saifei, HUANG Xinming, SUN Ling, XIE Xing, TANG Tianze. Design of Finite Field FFT for Fully Homomorphic Encryption Based on FPGA[J]. Journal of Electronics & Information Technology, 2018, 40(1): 57-62. doi: 10.11999/JEIT170312

Citation:

SHI Quan, HAN Saifei, HUANG Xinming, SUN Ling, XIE Xing, TANG Tianze. Design of Finite Field FFT for Fully Homomorphic Encryption Based on FPGA[J]. Journal of Electronics & Information Technology, 2018, 40(1): 57-62. doi: 10.11999/JEIT170312

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Design of Finite Field FFT for Fully Homomorphic Encryption Based on FPGA

doi: 10.11999/JEIT170312

1.
(School of Electronic Information, Nantong University, Nantong 226019, China)
2.

Funds:

The National Natural Science Foundation of China (61571246), The Natural Science Foundation of Xinglin College of Nantong University (13010538)

Received Date: 2017-04-10
Rev Recd Date: 2017-07-19
Publish Date: 2018-01-19

Abstract

Abstract

Large multiplier is an indispensable module in fully homomorphic encryption, while is also the most time-consuming module. Therefore, design of a large multiplier with good performance is help to promote the practical process of fully homomorphic encryption. Aimed at the demand of SSA (Sch?nhage-Strassen Algorithm) large multiplier, a 1624 bit finite field FFT based on FPGA is designed by using Verilog HDL language. By constructing the tree type large sum unit and using parallel processing method, the speed of FFT algorithm is improved effectively. And its correctness is proved by comparing with the system level simulation results in VIM compiler environment.
- Fully homomorphic encryption,
- Large multiplier,
- Finite field FFT,
- Field Programmable Gate Array (FPGA)

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References(24)

References

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