A Lightweight True Random Number Generator Based on Chain-Coupled Oscillation Rings
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摘要: 真随机数发生器(TRNG)作为一种重要的硬件安全原语,通过提取物理随机变量产生无法预测的真随机序列,为安全系统构建硬件可信根。然而,为了提升TRNG的随机性,往往需要引入大量熵源,导致整体硬件开销较高。为解决这一问题,本文提出一种基于链式耦合振荡环的轻量级TRNG。首先,通过推导伽罗瓦振荡环的状态方程,分析不规则振荡机理,为熵源电路设计提供指导。然后,设计延迟反馈异或环,以此构建链式熵源电路,并进行不规则振荡行为建模。最后通过实验验证,所提出的TRNG通过了NIST SP 800-22和NIST SP 800-90B测试,在Xilinx Artix-7 FPGA上的吞吐量为200Mbps,且硬件开销仅为11个LUT和4个DFF,在资源受限的轻量级场景具有良好的应用前景。Abstract:
Objective With the rapid growth of the Internet of Things, 5G/6G, and satellite Internet, resource-constrained devices increasingly require high-quality random numbers for key generation, authentication, masking, and other security functions. Although pseudo-random number generators are efficient, their outputs may be predictable once the seed or internal state is compromised. True random number generators (TRNGs) offer a hardware root of trust by extracting entropy from physical randomness, but many existing designs rely on multiple entropy sources or complex post-processing, leading to increased area and power consumption. To address this issue, this paper proposes a lightweight TRNG based on chain-coupled oscillation rings for high-quality randomness with very low FPGA overhead. Methods Starting from the state evolution of a Galois oscillation ring (GARO), this work demonstrates that ideal matched-delay conditions can result in periodic and predictable oscillation. However, in practical circuits, delay mismatch, jitter, and process variation disturb the ideal evolution and can be exploited as entropy sources. On this basis, a compact delay-feedback XOR ring is proposed to enhance state uncertainty, introduce feedback competition, and improve randomness through inter-stage delay differences. In addition, a second-order oscillation ring is incorporated to eliminate the all-zero stop state and provide continuous excitation. Multiple rings are then chain-coupled, enabling adjacent rings to mutually interfere with one another and thereby generate stronger irregular oscillations. The proposed design is modeled in MATLAB and implemented on a Xilinx Artix-7 FPGA. Finally, we evaluate its performance by NIST SP 800-22, NIST SP 800-90B, bias, autocorrelation, and voltage-temperature robustness tests. Results and Discussions Simulation confirms that the proposed structure avoids stable periodic locking and produces sustained irregular oscillation. Experimental results show that the TRNG passes all NIST SP 800-22 tests and achieves an average minimum entropy of 0.9936 in NIST SP 800-90B test, outperforming conventional RO and GARO-based TRNGs under similar conditions. The measured bias is only0.0228 %, and the autocorrelation remains well below the threshold, indicating excellent statistical independence. The design also maintains high entropy over temperatures from 0 °C to 80 °C and supply voltages from 0.9 V to 1.1 V. Implemented on Artix-7, our proposed TRNG achieves 200 Mbps throughput using only 11 LUTs and 4 DFFs, with 0.108 W power consumption.Conclusions This paper presents a lightweight chain-coupled oscillation-ring TRNG that exploits delay mismatch, phase disturbance, and feedback competition to generate high-quality physical randomness. The theoretical analysis clarifies how practical nonidealities transform ideal periodic oscillation into irregular oscillation, providing a design basis for compact oscillator-based entropy sources. By combining delay-feedback XOR rings with chain-coupled mutual disturbance and continuous excitation, the proposed design enhances entropy while avoiding excessive hardware overhead and complex post-processing. FPGA implementation and statistical evaluations verify high entropy, low bias, and high randomness under voltage and temperature variations. Therefore, the proposed TRNG achieves high randomness quality and high throughput while effectively reducing hardware overhead, making it suitable for resource-constrained security applications such as IoT terminals, lightweight cryptographic modules, and embedded authentication systems. -
表 1 NIST SP 800-22测试结果
NIST SP 800‐22 P-value Prop Frequency 0.122325 9/10 Block Frequency 0.122325 10/10 Cumulative Sums* 0.534146 9/10 Runs 0.534146 10/10 Longest Run 0.739918 10/10 Rank 0.534146 10/10 FFT 0.534146 10/10 Non-Overlapping Template* 0.350485 10/10 Overlapping Template 0.534146 10/10 Universal 0.739918 10/10 Approximate Entropy 0.122325 10/10 Random Excursions* 0.122325 4/4 Random Excursions Variant* 0.534146 4/4 Serial* 0.350485 10/10 Linear Complexity 0.350485 10/10 表 2 NIST SP 800-90B测试结果
NIST SP 800-90B p-max h-min MCV 0.501419 0.995911 Collision 0.535156 0.901968 Markov 3.5811E-39 0.997772 Compression 0.5 1 t-Tuple 0.52187 0.938238 LRS 0.527233 0.923488 MultiMCW 0.500626 0.998193 Lag Prediction 0.501736 0.995001 MultiMMC 0.501556 0.995517 LZ78Y 0.500495 0.998571 表 3 TRNG综合性能对比
TRNG结构 硬件平台 吞吐量(Mbps) 功耗(W) 硬件开销 能效 文献[26] Artix-7 80 — 866LUTs — 文献[27] Artix-7 100 0.119 38LUTs / 121DFF 66.34 文献[28] Artix-7 1.25 0.023 152 LUTs / 16 DFFs 0.36 文献[29] Artix-7 275.8 0.049 24 LUTs / 33 DFFs 234.52 文献[30] Artix-7 620 0.068 23 LUTs / 14 DFFs / 4 MUXs 396.42 文献[31] Artix-7 150 0.124 12 LUTs / 10 DFFs 100.80 本文 Artix-7 200 0.108 11 LUTs / 4 DFFs 168.35 -
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