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基于线下估计和线上补偿的时间交错采样ADC失配误差补偿方法

邹应全 吴太龙 彭榆淞 孙一航 刘宜罡 张翠芳

邹应全, 吴太龙, 彭榆淞, 孙一航, 刘宜罡, 张翠芳. 基于线下估计和线上补偿的时间交错采样ADC失配误差补偿方法[J]. 电子与信息学报, 2019, 41(1): 226-232. doi: 10.11999/JEIT180098
引用本文: 邹应全, 吴太龙, 彭榆淞, 孙一航, 刘宜罡, 张翠芳. 基于线下估计和线上补偿的时间交错采样ADC失配误差补偿方法[J]. 电子与信息学报, 2019, 41(1): 226-232. doi: 10.11999/JEIT180098
Yingquan ZOU, Tailong WU, Yusong PENG, Yihang SUN, Yigang LIU, Cuifang ZHANG. Method for Compensating Distortion Created by Mismatch Errors in Time-interleaved ADCs Based on Offline Estimation and Online Correction[J]. Journal of Electronics & Information Technology, 2019, 41(1): 226-232. doi: 10.11999/JEIT180098
Citation: Yingquan ZOU, Tailong WU, Yusong PENG, Yihang SUN, Yigang LIU, Cuifang ZHANG. Method for Compensating Distortion Created by Mismatch Errors in Time-interleaved ADCs Based on Offline Estimation and Online Correction[J]. Journal of Electronics & Information Technology, 2019, 41(1): 226-232. doi: 10.11999/JEIT180098

基于线下估计和线上补偿的时间交错采样ADC失配误差补偿方法

doi: 10.11999/JEIT180098
详细信息
    作者简介:

    邹应全:男,1976年生,博士,副教授,研究方向为智能信息采集与处理

    吴太龙:男,1991年生,硕士生,研究方向为智能信息处理与智能控制

    彭榆淞:男,1990年生,硕士生,研究方向为智能信息处理与智能控制

    孙一航:男,1994年生,硕士生,研究方向为无线信息传输技术

    刘宜罡:男,1992年生,硕士生,研究方向为智能信息处理与智能控制

    张翠芳:女,1961年生,博士,教授,研究方向为智能信息处理与智能控制

    通讯作者:

    张翠芳 cfzhang_scce@home.swjtu.edu.cn

  • 中图分类号: TN79+2; TP391

Method for Compensating Distortion Created by Mismatch Errors in Time-interleaved ADCs Based on Offline Estimation and Online Correction

  • 摘要:

    该文提出一种改进的时间交错采样模数转换器(TIADC)失配误差补偿方法。系统通过误差参数和简化的拉格朗日插值算法分别实现了对偏置、增益的失配误差补偿和采样时间的失配误差补偿。该补偿方法在FPGA中采用低复杂度的定点运算实现,在TIADC硬件平台中实现了对多通道ADC采样数据的线上校正。实验结果表明:所提改进方法在仿真环境下使无杂散动态范围提升了51 dB,并且在硬件实现过程中使SFDR优化达45 dB。在保持失配误差估计精度和补偿效果优良的前提下,该方法不仅降低了算法的计算复杂度,而且该补偿结构不受TIADC通道数目的限制。

  • 图  1  TIADC采样结构

    图  2  偏置失配和增益失配误差补偿结构图

    图  3  采样时间失配误差补偿结构图

    图  4  采样输出序列频谱对比图

    图  5  Lagrange插值阶数$N$与SFDR、输入信号频率与采样频率比值${f_{\rm{t}}}/{f_{\rm{s}}}$的关系图

    图  6  硬件失配误差补偿结构运算时间仿真图

    图  7  定点运算与浮点运算的失配误差补偿频谱对比图

    图  8  TIADC系统中失配补偿前后输出数据频谱对比图

    表  1  失配误差的真实值与估计值

    ADC通道ADC1ADC2ADC3ADC4ADC5ADC6ADC7ADC8
    G1.044400.957300.961701.021401.004600.971101.045701.02500
    $\widehat G$1.044400.957230.961501.021371.004560.970811.045551.02493
    O0.02130–0.011200.042900.029400.012500.02600–0.03320–0.03170
    $\widehat O$0.02130–0.011190.042920.029400.012510.02599–0.03320–0.03169
    T (ps)0502–877324–4151109757–496
    $\widehat T\; {\rm{(ps)}}$2503–879324–4171112758–498
    下载: 导出CSV

    表  2  本文所改进的误差估计算法与文献[11]和文献[13]中误差估计算法的相对估计误差对比(%)

    估计方法偏置误差的相对估计误差增益误差的相对估计误差采样时间误差的相对估计误差
    文献[11]1.4160.021.29
    文献[13]0.30.00961.28
    本文改进方法0.040.030.48
    下载: 导出CSV

    表  3  硬件补偿电路的FPGA片上逻辑资源消耗情况

    资源类型总组合功能专用逻辑寄存器18 bit嵌入式乘法器存储容量
    资源消耗情况111/825698/82565/180/165888
    下载: 导出CSV

    表  4  偏置、增益和采样时间失配误差估计值

    ADC通道ADC1ADC2
    $\widehat G$1.0611001.061900
    $\widehat O\;\left( {\rm{V}} \right)$–0.0570000.000053
    $\widehat T\;\left( {\rm{ns}} \right)$1.1912001.424300
    下载: 导出CSV
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出版历程
  • 收稿日期:  2018-01-04
  • 修回日期:  2018-10-22
  • 网络出版日期:  2018-10-25
  • 刊出日期:  2019-01-01

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