A Single Event Upset Fault Injection Method Based on Multi-clock for Aviation Environment

With the new electronic devices are increasingly used by airborne avionics equipment, Single Event Upset (SEU) fault has become a major hazard on aviation safety. Because of the randomness of SEU fault, the SEU fault occurs at any moments. Firstly, a multi-clock control is introduced to construct an SEU fault injection testing system. Secondly, the system simulates multi-time point of failure with real situations caused by single event upset effects. For sequential circuits constructed by SRAM-based FPGA, the influence of SEU is studied by the system and the failure data and failure rate of the undertest module is counted online. Two kinds of FPGA-based fault-tolerant circuit are tested by this system. Comparing with the traditional Triple Modular Redundancy (TMR) technology, the anti-SEU performance of the proposed multi-clock edge TMR reinforcement technology is improved about 1.86-fold. The experiment results verify that the proposed multi-clock SEU fault injection testing system is a quick, low-cost and highly accurate test for the single-event upsets fault, and demonstrate the effectiveness of the proposed SEU reinforcement technology.